QRP Transceiver 40W Power Amplifier

Updated 20170212
There is no major advance to be made in class AB amplifier design, but improvements in economy are possible. Problems with designing for the HF frequency range are:
  • RF FETs are expensive and often difficult to source
  • The industry is producing transistors for VHF and above…
  • Which means those for lower frequencies are expensive
  • Switching FETs are cheap but have many shortcomings
  • Linearity issues
  • Efficiency issues

FETs designed for switching power supplies are not ideal, but much cheaper, so I embarked on a project to find a usable part, and make a low-cost amplifier using it. Blank PCBs (150x100mm) for the project are as shown here.
Aug2016 PCB
The amplifier section is on the left, filter to the right. If anyone wants a low-pass as a separate project, it can be split off by cutting along the dotted line!

The most common modern device for HF amplifiers of about 50W is the
Mitsubishi RD70HHF1. They have some disadvantages:
  • High cost >£25 each in small quantities
  • Output impedance too low for an efficient 1:4 output transformer
  • Doubtful linearity with 12V supply

Having discounted the conventional wisdom devices, I looked through the enormous range of switching FETs available. These are the challenges of designing with cheaper devices:
  • High gate capacitance (except early generation e.g. IRF510), makes a flat 1-30MHz response impossible
  • TO-220 packages have inductive wire bonds
  • Switching FETs hotspot badly and the bias point is unstable… Fairchild Semi agree, OnSemi agree, Infineon agree, Microsemi agree…
  • Temperature compensation and other measures are essential

I found these are most suitable in terms of medium gate capacitance, low-ish transconductance and good thermal conductivity:
STP14NF12 (TO-220)
FQP13N10 (TO-220)
IXTP2R4N50 (TO-220)
STW13N60M2 (TO-247)

The first two are similar, with the ST part having slightly higher V
DSS rating, and the Fairchild part having a track record in citizen band radio output stages. The IXYS FET is only available through Mouser in the UK, and has a higher voltage rating. The STW13N60M2 is the lowest gate capacitance available in TO-247, and it's interesting to test a high voltage part against the older generation 100V ones

To estimate how much temperature compensation is needed, the FQP13N10 data sheet gives a graph of V
GS against Id and temperature. It comes out as 0.45V/150C = 3mV/C, which is above the temperature coefficient of a single diode but less than two. Having good thermal contact between a plastic FET and diodes is difficult. Hence getting a rapid response of the compensation circuit is difficult. Compensating the bias has a limited effectiveness against thermal instability. The no-signal bias must fall well into the safe operating area, but dropping the bias too far doesn't reduce dissipation under high signal very much. It has the disadvantage of compromising linearity. So I include bias stabilisation but became aware of its limitations.

Besides the bias, a FET can hotspot and burnout under continuous high signal. So any amplifier like this must be rated in SSB for higher power than in CW modes like PSK31. Having neutralisation (feedback) from drain to gate is actually a form of bias. Having this allows the no-signal bias to be lower, giving the FETs a chance to drop well inside their forward bias safe operating area during speech pauses. The disadvantage is reduced gain and lower efficiency. I decided to use a current limited power supply and intelligently reduce bias using software.

I looked at designing a boost power supply using
TI WebBench. The cost of a 30V, 5A boost converter makes up half the difference to using RD70HHF1 FETs in the first place, let alone the extra constructional complexity.

A solution was found in "250W" boost power supplies from China/eBay. These can put out 150W if heat-sinked, and are voltage adjustable, with current limit for under £4! With such a cheap way to get 30V @4A, plans for 50W+ amplifiers were abandoned, and I decided to aim for 30-40W output. The Chinese boost module concept allows a part cost of about £50 for a 40W amplifier (excluding heatsink) and these advantages over of-the shelf HF amplifiers:
  • Operate at the same output power with 10-20V input voltage
  • Improved efficiency output transformer
  • Improved linearity due to higher supply voltage

The Chinese boost module has the chip number filed off. The only chip I can find with the ground pin the same, in SOIC14 package is the TL594. In the current PCB, I switch the power supply using a P-channel FET. This is not optimal, it would be better if either the power module was switched on permanently or used a shutdown pin. Work to determine how much noise is generated by leaving it on continuously is ongoing. There appears to be no shutdown function and the circuit does not correspond to the TL594 either. A shutdown function is necessary because these modules do not have proper current limiting. Also handy to reduce quiescent current.

It's still impossible for me to compete with Chinese amplifiers based on surplus RF transistors. It has to be remembered that the majority of devices sold on eBay do not reach their specified output power. I decided to add a number of extras which push up cost but make a complete system - RxTx relays; Low-pass-filter; SWR bridge; SWR monitoring; micro controller for automatic band switching and protection.

The circuit diagram is
here and here. I found FQP13N10 FETs the best overall performers. The large STP13N60M2 FETs had some bizarre bias quirks, and are 3x the price of the FQP13 with no benefit in performance. The STP14NF12 has a tendency to self-destruct which I never fully understood but will avoid. Here is the amplifier under test, with the Chinese boost module mounted next to the main board.
This project is now complete as a technology demonstrator for low-cost FETs with micro-controller enhancements. A mini-movie is on Youtube. I have not yet completed the FQP13N10 version with enough confidence to release. The RD16HHF1 version BOM is here, and the option to play safe and use the lower power devices will remain in future revisions. The higher power version needs some more testing before I can release the BOM and finalise the project.

Software - as mentioned on the video above, the software requires keying into transmit when first powered up. This measures the temperature compensation diodes and calculates the bias offset. Pressing the CAL button during transmit calibrates to the peak transmit power. Fitting a zero-ohm link across R22 forces the board to use a binary code on the BAND connection, instead of automatic band switching.

The FQP13N10 is a cheap device which will work up to 30MHz with 2-3dB less gain than at 3MHz. This is achieved with negative feedback to swamp the Miller capacitance. FQP13N10 gives 20dB+ gain at lower frequencies without Miller compensation. With compensation, 13dB gain at 3MHz and 11dB at 30MHz was measured on prototypes. The micro-controller software must switch over to transmit very carefully to avoid a high SWR when the band is changed. Thus for future versions, some kind of QSK "hang" function will be needed. Work to test alternative FETs will continue.

It's important to consider the tradeoff of drain voltage headroom vs. drain-source capacitance. Increasing the supply voltage pushes up the impedance and allows optimum choice of output transformer. Using a 1:1 output transformer pushes up the peak drain voltage. At 40W into 50Ω, the drain voltage peaks at 64V (assuming zero saturation voltage). Any SWR above 2:1, especially inductive loads, will easily push the crest voltage above 100V. This will blow a 100V FET instantly. This is why FET amplifiers can be very sensitive to high SWR.

So why not just use a (12V) low voltage supply? The answer is found in this graph.
Pasted Graphic

The horrible change of capacitance (Coss) of a FET causes non-linearity. Higher voltage FETs shift the above graph to some extent, so using a higher voltage FET to reduce intermodulation distortion is a trade-off of SWR tolerance against the non-linearity.

Further improvements will take another PCB revision and include:
  • Use a 16x2 alphanumeric LCD instead of LEDs
  • Use ready wound baluns for the input circuit
  • Use larger, cheaper cylindrical ferrites for output transformer
  • Change 74AC74 to single D-flip-flop gate
  • Automatic bias setting, with current monitoring
  • Faster microcontroller (probably MSP430F5152)
  • Add fault protection diodes to gate bias circuit
  • Revise SWR bridge to use pick-up toroids (flatter SWR vs. frequency response)
  • Optimise all SMD pad sizes, no 0603/0805 oddities!
  • Minimise TO-220 lead lengths on footprints

Most importantly, design to fit in a practical case, 160 x 100mm. This means having the LCD on "short edge" and a PCB mounted BNC socket to fit through an end panel. The Hammond case allows the PCBA to slot in and the FETs to fix onto a heatsink. That case allows room for expansion, to add a battery board or other advancements as described next.

Further thoughts on HF amplifiers

Now some blue-sky thinking. When out on mobile radio trips I dream about having a big signal to shout back at the DX I can hear. My 90W from an Elecraft KXPA100 soon sags to 80W as the battery drops. Wouldn't it be wonderful to have a 100W box that doesn't waste another 100W? A 200W amp wasting 40W would be ideal. Let's see what's involved in making one…

My previous amplifiers are all class-AB like others on the market. A starting point for something better is to look at different architectures and different classes.

Active devices used in linear (resistive) mode -
A: Active devices conduct all the time, resulting in <50% efficiency, and unsuitable for power stages
B: Active devices conduct exactly half the time , with <78.5% efficiency which is never realised, and produces crossover distortion
AB: Combination of A and B where crossover distortion is reduced, but efficiency falls well below 78.5%
C: Active devices conduct less than half the time, resulting in ~80% efficiency but a lot of distortion and low gain
Active devices used as switches -
D: Active devices in a pair conduct alternately with duty cycle as applicable. Theoretical efficiency is high because of non-linearity.
E: Absorb parasitic reactances in resonances, and switches at zero-crossings for efficiency, which can be >80%
F: Shape harmonics to give rectangular voltage and sinusoidal current waveforms, more harmonics shaped = higher efficiency
S: Pulse-width modulates, and uses a reconstruction filter to give the wanted signal

For class-AB efficiency improvements, the simplest way is to modulate the supply voltage. This is generally called
envelope tracking. It's used in mobile comms to reduce wasted power in base stations and in some handsets. Modulating the supply voltage ensures optimum efficiency at mid and high power levels. Technology to do this has been available for a long time. But it only increases the <30% efficiency at mid power levels to the same as full power, 60% if you're lucky.

Modulating the supply voltage of a class-AB amplifier is different to envelope
restoration which modulates the supply of a switching power stage. There's a wealth of academic papers on the internet about improved efficiency amplifiers, but >1GHz for the short range mobile comms industry. As with many HF problems amateurs are left to solve this without help from "professional" engineers. No dedicated semiconductors are available for HF, and power levels are much higher than with short range mobile networks.

Something rarely encountered at >1GHz must be considered - mismatches. An impedance above the design value causes drain voltage to increase (as found with my class-AB designs) and the drain voltage limit can be easily be exceeded. That makes a FET go dead short on all pins, causing a burnout. So any practical design must include SWR protection to shut the gate drives off ASAP.

Some amateur AM on the lower HF bands has used class-E for many years.

An attempt by SGC to sell a class-E amplifier failed because of connector problems. I think they had bigger issues like linearity (in a time before pre-distortion), and questionable advantage over class-AB with mains power. It's hard to notice if 50% power gets wasted from a mains supply. However, putting out 200W and wasting 200W from a battery gets noticed. SGC used Kahn's method with voltage modulation and class-E.

Having looked into the detail the following spec is a big challenge:

  • Accurately reproduce SSB modulation
  • Switching high current in a few nanoseconds
  • Attenuating all spurious responses (harmonics, linearity, noise)
  • Keeping the system >80% efficient to deliver the promise
  • Cover at least up to 14.35MHz

After looking at
this wide ranging document, I decided a combination of methods is necessary for HF SSB. But ideas like Doherty amplifiers or out-phasing are either not going to meet the spec, or be far too complicated to do as a multi-band HF amplifier.

1. Class-AB/F, modified Kahn's method, inspired by this design with valves. Class-AB and class-F can be unified in their drain circuitry and output filter. The main difference is in how they are driven. This topology gives class-AB drive at low levels and F at high levels. The changeover point can be made by altering the bias at an input threshold level, the devices just limiting at high levels "for free". The drain voltage needs to be modulated in class-F mode.

With a balanced amplifier the even order harmonics are suppressed, so a class-F type output network only has to deal with the odd harmonics. Going to the 7th harmonic means 3 resonators. The present generation of LDMOS FETs have low capacitance, so switching power at 30MHz looks feasible without having to do much to absorb the output capacitance/varactor. LDMOS prices are high but then so is a large dumb piece of aluminium. Thankfully someone decided to avoid NXP-Qualcomm having a monopoly on RF LDMOS, and spun off Ampleon for competition.

It's a great benefit if the power supply can boost 13V up to say 48V, but then the lowest level supply becomes 12V. Designing a supply with a -3dB bandwidth of about 4kHz has been done before, but would need careful simulation.

With class-F techniques its possible for a second FET to take the role of a 3rd harmonic power feeder. This device can be smaller than the main one, and allow a smaller/cheaper main switch. It may be possible for a third (7th harmonic) switch to both increase efficiency and spread heat dissipation even further.

Can cover to 30MHz easily;
Minimal DSP/software intervention;
Built-in mechanism for dealing with low amplitudes;

Complex voltage modulated boost/SEPIC power supply block;
Large inductor for filtering buck boost will cause phase problems;
Difficulty of designing output filter (class-F);
PA efficiency drops at lower voltages;

2. Class-AB/PWM Class-DE, modified Kahn's method. The switching amplifier supply can be pulse width modulated directly. But PWM of the output amplifier generates upper/lower sidebands at the fundamental PWM frequency! This amounts to sigma-delta modulation with an oversampling frequency of 1MHz/3kHz audio bandwidth = 333x.

1 causes phase variation across the frequency range of the input signal from the power supply output filter inductor. In scheme 2 the restoration supply's filter is moved to the final output, so there are less phase errors in the drain modulator. The need for a bandpass filter means this scheme is unsuitable for class-F where the output is lowpass filtered. Class-DE is basically balanced class-E. Tuned output to filter the sidebands. Balanced to share the dissipation across 2 devices.

This scheme stands out as a rarity more applicable to HF than UHF. A PWM frequency of (say) 1MHz is impossible to separate from a 1GHz fundamental. For a 7MHz fundamental it's quite feasible. A minimum duty cycle can be set, below which class-AB takes over. It lends itself to an integrated driver/MOSFET (DrMOS) chip as used in computer power supplies. Like the
Vishay or Fairchild devices to do the 1MHz PWM.

As a pulse waveform falls below about 10% duty, harmonic magnitude roughly equals the fundamental.
Screen Shot 2017-01-17 at 21.24.31
Blue=fundamental, red = 3rd, grey=5th, yellow=7th harmonic.

With a 1MHz fundamental, the 3MHz harmonic becomes about equal at 10%. This Fourier series result can be used to squeeze a bit more dynamic range out of the scheme. A problem with comes with wrap-around-zero. For a 3.5MHz fundamental and 1MHz switching, the 7th harmonic (7MHz) generates an image at 3.5MHz. So either the fundamental needs shifting for different bands or there needs to be some filtering of the PWM supply.

As with scheme
1 the bias has to be carefully controlled to move to class-AB at low levels. I need to simulate an amplifier with modulated supply to test this scheme.

Virtually eliminates phase errors caused by low-pass filter in the modulating supply;
No intermediate buck/boost supply filter inductor;
High and low duty cycles have less fundamental frequency, probably reducing sideband problems;
PA is either at optimum voltage (for matching/efficiency) or off;

Difficulty filtering spurii, have to make PWM frequency variable and high as possible;
Will need >1MHz PWM to reach 14MHz due to filtering difficulties;
High 'Q' inductors needed in narrow-band 50Ω filter to avoid losses and maintain purity;
The drain voltage is set by the supply voltage;

Block diag

The output bandpass filter demands high 'Q' inductors, but looks feasible -
80m bandpass

The response may prove to be tight enough at 80m. I also looked at a 40m filter with a similar outcome.
80m response

3. Sigma-Delta Modulator, similar to this document to generate a modulated signal with a 4x oversampled modulation frequency. This uses the idea of Shannon's bandwidth and sampling theorem. Using a complex PWM scheme with 4x fundamental and bandpass filtering the output. Moving away from the idea of modulating the power supply, and using PWM to modulate the switching devices directly at the signal frequency.

Firstly would the extra complexity of PWM in the main stage offset the complexity of a switching regulator feeding a fixed width main output stage? I think the answer for an HF design is
'interesting', but not as good as the PWM class-DE. Unfortunately Class-E/F are designed for 50% duty, as shown in this book.

Low amplitudes of output demand small duty cycles. It means switching at over 100MHz bandwidth even for a 14MHz fundamental. A way to counteract the problem of narrow PWM harmonics is swapping to class-AB at low power levels.

The bandpass filter acts as a "reconstruction filter". The need for very narrow pulses can be mitigated by switching at a higher frequency because the pulses are spread over several cycles of the wanted output frequency. This utilises the fact that for (say) 20m band SSB, there's only a 3kHz wide signal sitting in the range 14,100-14,350kHz, vs. a sampling frequency of 56.4-57.4MHz.

A problem of sigma-delta is noise generation. Probably by increasing the switching rate to 8x (not 4x) the fundamental the noise would be reduced. Switching high current with <5ns edges is feasible with present technology.

The biggest problem is the lack of easy class-AB switchover as in the other methods to meet the required dynamic range. An answer is to modulate the supply but only at low amplitudes. This would mean a switcher in the supply saturated on for all amplitudes above 20%. Below that the switch starts to drop out and the supply drops down. This way phase problems with the switcher filter are constrained to low output levels.

Elegant in terms of fewer switching devices;

Struggles to reach 30MHz due to fast switching required with class-D;
Difficulty at low amplitudes, can't swap to class-AB mode easily;
Can't use class-E or F with varying pulse widths;
Really needs a ready made FPGA-SDR platform like
LimeSDR or Red Pitaya to do the processing;
Maybe impossible as a stand-alone amplifier;

Preliminary conclusion
It appears scheme
2 is the best one. Initial attempts at simulation cause convergence errors…