QRP Transceiver 40W Power Amplifier

Updated 20170111
There is no major advance to be made in class AB amplifier design, but improvements in economy are possible. Problems with designing for the HF frequency range are:
  • RF FETs are expensive and often difficult to source
  • The industry is producing transistors for VHF and above…
  • Which means those for lower frequencies are expensive
  • Switching FETs are cheap but have many shortcomings
  • Linearity issues
  • Efficiency issues

FETs designed for switching power supplies are not ideal, but much cheaper, so I embarked on a project to find a usable part, and make a low-cost amplifier using it. Blank PCBs (150x100mm) for the project are as shown here.
Aug2016 PCB
The amplifier section is on the left, filter to the right. If anyone wants a low-pass as a separate project, it can be split off by cutting along the dotted line!

The most common modern device for HF amplifiers of about 50W is the
Mitsubishi RD70HHF1. They have some disadvantages:
  • High cost >£25 each in small quantities
  • Output impedance too low for an efficient 1:4 output transformer
  • Doubtful linearity with 12V supply

Having discounted the conventional wisdom devices, I looked through the enormous range of switching FETs available. These are the challenges of designing with cheaper devices:
  • High gate capacitance (except early generation e.g. IRF510), makes a flat 1-30MHz response impossible
  • TO-220 packages have inductive wire bonds
  • Switching FETs hotspot badly and the bias point is unstable… Fairchild Semi agree, OnSemi agree, Infineon agree, Microsemi agree…
  • Temperature compensation and other measures are essential

I found these are most suitable in terms of medium gate capacitance, low-ish transconductance and good thermal conductivity:
STP14NF12 (TO-220)
FQP13N10 (TO-220)
IXTP2R4N50 (TO-220)
STW13N60M2 (TO-247)

The first two are similar, with the ST part having slightly higher V
DSS rating, and the Fairchild part having a track record in citizen band radio output stages. The IXYS FET is only available through Mouser in the UK, and has a higher voltage rating. The STW13N60M2 is the lowest gate capacitance available in TO-247, and it's interesting to test a high voltage part against the older generation 100V ones

To estimate how much temperature compensation is needed, the FQP13N10 data sheet gives a graph of V
GS against Id and temperature. It comes out as 0.45V/150C = 3mV/C, which is above the temperature coefficient of a single diode but less than two. Having good thermal contact between a plastic FET and diodes is difficult. Hence getting a rapid response of the compensation circuit is difficult. Compensating the bias has a limited effectiveness against thermal instability. The no-signal bias must fall well into the safe operating area, but dropping the bias too far doesn't reduce dissipation under high signal very much. It has the disadvantage of compromising linearity. So I include bias stabilisation but became aware of its limitations.

Besides the bias, a FET can hotspot and burnout under continuous high signal. So any amplifier like this must be rated in SSB for higher power than in CW modes like PSK31. Having neutralisation (feedback) from drain to gate is actually a form of bias. Having this allows the no-signal bias to be lower, giving the FETs a chance to drop well inside their forward bias safe operating area during speech pauses. The disadvantage is reduced gain and lower efficiency. I decided to use a current limited power supply and intelligently reduce bias using software.

I looked at designing a boost power supply using
TI WebBench. The cost of a 30V, 5A boost converter makes up half the difference to using RD70HHF1 FETs in the first place, let alone the extra constructional complexity.

A solution was found in "250W" boost power supplies from China/eBay. These can put out 150W if heat-sinked, and are voltage adjustable, with current limit for under £4! With such a cheap way to get 30V @4A, plans for 50W+ amplifiers were abandoned, and I decided to aim for 30-40W output. The Chinese boost module concept allows a part cost of about £50 for a 40W amplifier (excluding heatsink) and these advantages over of-the shelf HF amplifiers:
  • Operate at the same output power with 10-20V input voltage
  • Improved efficiency output transformer
  • Improved linearity due to higher supply voltage

The Chinese boost module has the chip number filed off. The only chip I can find with the ground pin the same, in SOIC14 package is the TL594. In the current PCB, I switch the power supply using a P-channel FET. This is not optimal, it would be better if either the power module was switched on permanently or used a shutdown pin. Work to determine how much noise is generated by leaving it on continuously is ongoing. There appears to be no shutdown function and the circuit does not correspond to the TL594 either. A shutdown function is necessary because these modules do not have proper current limiting. Also handy to reduce quiescent current.

It's still impossible for me to compete with Chinese amplifiers based on surplus RF transistors. It has to be remembered that the majority of devices sold on eBay do not reach their specified output power. I decided to add a number of extras which push up cost but make a complete system - RxTx relays; Low-pass-filter; SWR bridge; SWR monitoring; micro controller for automatic band switching and protection.

The circuit diagram is
here and here. I found FQP13N10 FETs the best overall performers. The large STP13N60M2 FETs had some bizarre bias quirks, and are 3x the price of the FQP13 with no benefit in performance. The STP14NF12 has a tendency to self-destruct which I never fully understood but will avoid. Here is the amplifier under test, with the Chinese boost module mounted next to the main board.
Amp2016-3
This project is now complete as a technology demonstrator for low-cost FETs with micro-controller enhancements. A mini-movie is on Youtube. I have not yet completed the FQP13N10 version with enough confidence to release. The RD16HHF1 version BOM is here, and the option to play safe and use the lower power devices will remain in future revisions. The higher power version needs dome more testing before I can release the BOM and finalise the project.

Software - as mentioned on the video above, the software requires keying into transmit when first powered up. This measures the temperature compensation diodes and calculates the bias offset. Pressing the CAL button during transmit calibrates to the peak transmit power. Fitting a zero-ohm link across R22 forces the board to use a binary code on the BAND connection, instead of automatic band switching.

The FQP13N10 is a cheap device which will work up to 30MHz with 2-3dB less gain than at 3MHz. This is achieved with negative feedback to swamp the Miller capacitance. FQP13N10 gives 20dB+ gain at lower frequencies without Miller compensation. With compensation, 13dB gain at 3MHz and 11dB at 30MHz was measured on prototypes. The micro-controller software must switch over to transmit very carefully to avoid a high SWR when the band is changed. Thus for future versions, some kind of QSK "hang" function will be needed. Work to test alternative FETs will continue.

It's important to consider the tradeoff of drain voltage headroom vs. drain-source capacitance. Increasing the supply voltage pushes up the impedance and allows optimum choice of output transformer. Using a 1:1 output transformer pushes up the peak drain voltage. At 40W into 50Ω, the drain voltage peaks at 63V (assuming zero saturation voltage). Any SWR above 2:1, especially inductive loads, will easily push the crest voltage above 100V. This will blow a 100V FET instantly. This is why FET amplifiers can be very sensitive to high SWR.

So why not just use a (12V) low voltage supply? The answer is found in this graph.
Pasted Graphic

The horrible change of capacitance (Coss) of a FET causes non-linearity at low Vds. Higher voltage FETs shift the above graph to some extent, so using a higher voltage FET is a trade-off of SWR tolerance against the non-linearity.

Further improvements will take another PCB revision and include:
  • Use a 16x2 alphanumeric LCD instead of LEDs
  • Use ready wound baluns for the input circuit
  • Use larger, cheaper cylindrical ferrites for output transformer
  • Change 74AC74 to single D-flip-flop gate
  • Automatic bias setting, with current monitoring
  • Faster microcontroller (probably MSP430F5152)
  • Add fault protection diodes to gate bias circuit
  • Revise SWR bridge to use pick-up toroids (flatter SWR vs. frequency response)
  • Optimise all SMD pad sizes, no 0603/0805 oddities!
  • Minimise TO-220 lead lengths on footprints

Most importantly, design to fit in a practical case, 160 x 100mm. This means having the LCD on "short edge" and a PCB mounted BNC socket to fit through an end panel. The Hammond case allows the PCBA to slot in and the FETs to fix onto a heatsink. That case allows room for expansion, to add a battery board or other advancements as described next.

Further thoughts on HF amplifiers

Now to some blue-sky thinking. When out on mobile radio trips I often dream about having a big signal to shout back at the DX I can hear. My 90W from an Elecraft KXPA100 soon sags to 80W as the battery runs down. Wouldn't it be wonderful to have a 100W box that doesn't waste another 100W? A 200W amp wasting 40W would be ideal. Let's see what's involved in making one…

My previous amplifiers are all class-AB which is the same configuration as others on the market. Starting point for something better is to look at different architectures, and particularly different classes. My definition of amplifier classes follows.

A: Active devices conduct all the time in linear mode, resulting in <50% efficiency, and unsuitable for power stages
B: Active devices conduct exactly half the time in linear mode, with <78.5% efficiency which is practically never realised, and the gate threshold produces distortion
AB: Combination of A and B where distortion from the gate threshold region is reduced, but efficiency falls well below 78.5%
C: Active devices conduct less than half the time and in linear mode, resulting in ~80% efficiency but a lot of distortion
D: Active devices are saturated (on/off) and 2 conduct alternately with duty cycle as applicable. Theoretical efficiency is high because of non-linearity.
E: Absorbs parasitic reactances in resonances and switches at zero-cross instants for efficiency, which can be >80% in practice
F: Shapes harmonics to give rectangular current waveform and sinusoidal voltage waveform, more harmonics shaped equals higher efficiency
S: Pulse-width modulates, and uses a reconstruction filter to give the wanted signal

For class-AB efficiency improvements, the simplest way is to modulate the supply voltage. This is called either
envelope tracking or class-H. It's used in mobile comms to reduce wasted power in base stations and in some handsets. Modulating the supply voltage ensures optimum efficiency at mid and high power levels. Technology to do this has been available for a long time. But this technique just increases the <30% efficiency at middle power levels to 50%.

Modulating the supply voltage of a class-AB amplifier is different to envelope
restoration which modulates the supply of a class-D/E/F stage. This technique can transmit SSB if the phase of the input signal is preserved. It looks feasible but would need driving from a DSP system to compensate for the non-linearity of the amplifiers. Maybe a stand alone amplifier using this technique wouldn't work.

There's a wealth of academic papers on the internet about improved efficiency amplifiers, but looking at >1GHz for the mobile comms industry. As with many HF problems amateurs are left to solve this, and the attitude of "professional" engineers is rather snobbish. Despite the lower HF frequency, harmonics still have to be dealt with. So the resultant topology turns out to have some resonant elements involved. It seems to be essential the circuit resonates with/swamps the FET output capacitance.

Something else not often encountered at >1GHz must be considered - mismatches. An impedance above the design value causes drain voltage to increase (as found with my class-AB designs) and the drain voltage maximum can be easily exceeded. FETs often go dead short across all pins, causing PCB burnout. So any commercially sold design must include SWR protection to shut the gate drives off within 1ms of an SWR fault.

The best efficiency is class-D/E/F where the power devices are either on or off. Amplifiers to make CW and AM signals have been around for a long time. Up to 1GHz class-E/F is ideal for CW signals, and moderate extra complexity over class-AB. Use of such AM transmitters on medium wave and lower HF is old news now. Some
amateur AM on the lower HF bands has used class-E.

There was an attempt to sell a class-E amplifier as
the Mini-Lini in 2006, but it failed because of problems with connectors. I think they had wider problems, like linearity (in a time before pre-distortion), and questionable advantage over class-AB with mains power. It's hard to notice if 50% power gets wasted from the mains supply. Battery supply is different. Putting out 200W and wasting 200W gets noticed. They were using Kahn's method with voltage modulation and fixed pulse width class-E.

Amateur HF amplifiers must work in SSB mode which is very different to the modulation used in short-range mobile infrastructure. Doing AM involves modulating at baseband (audio) as a simple PWM system. But SSB is much more difficult. Approaches to SSB will involve a mixture of DSP and sampling theory. It may seem the low HF frequency and the benefits of 2017 technology would help… but having looked into the detail, the following spec is a big challenge:

  • Requires amplitude and phase information
  • Have to switch high current in a few nanoseconds
  • Covering several octaves across HF bands
  • Attenuating all spurious responses (harmonics, linearity)
  • Keeping the system >80% efficient to deliver the promise
  • Cover at least up to 14MHz

After looking at
this wide ranging document, I decided the following methods are the most applicable to HF SSB.

1. Envelope restoration, Kahn's method. As with all these ideas, it really needs a ready made FPGA-SDR platform. Such platforms are LimeSDR or Red Pitaya. Moving away from the idea of modulating the power supply, and using PWM to modulate the switching devices themselves. The first question is would the extra complexity of PWM in the main stage offset the complexity of a buck-boost regulator feeding a fixed width main output stage? I think the answer for an HF design is 'yes'. The buck-boost takes some energy even with today's 90% efficiency designs and just doesn't seem an elegant way to do it. The second question is how to design a circuit for a wildly varying duty cycle (and therefore harmonic content), remembering classical class-E/F are designed for fixed duty cycles.

With a balanced amplifier the even order harmonics are suppressed, so a class-F type output network only has to deal with the odd harmonics. Going to the 7th harmonic means 3 resonators, plus the network to swamp the FET output varactor. The level of odd order harmonics in a rectangular wave vs. duty cycle is indicated by this graph:
Screen Shot 2017-01-17 at 21.24.31
Blue=fundamental, red = 3rd, grey=5th, yellow=7th harmonic. With low duty the harmonics start to converge on the textbook "picket fence" distribution, to add to the problem of rise/fall times. The 7th harmonic is probably the level of filter complexity where an extra stage gives diminishing returns. Generally harmonic rich class-C amplifiers have no more than 4 LPF inductors, so this is not without precedent.

Even if the FETs could switch instantly, the efficiency would drop off substantially below 10% duty (20% overall output level) because of the harmonics. At low levels, a lot of the percentage power is in the harmonics. Perhaps a way round this is to have a slow high power switch that cuts off below a threshold, and a fast low power switch that's active all the time and shoulders the whole power at <20% of overall output. With class-F techniques this can take the role of a 3rd harmonic power feeder. Having read some of
this book, it is obvious the classical mobile comms amplifiers are not designed for varying duty cycle!

Another approach to counteract the problem of narrow PWM harmonics is switching to class-AB when the PWM duty cycle goes below 10%. The switchover needs some intelligence to decide when to change over, as there would probably be some switching "glitch". Running class-AB below 20% of the amplifier's rated output would mean 20W of dissipation for a 100W amplifier of efficiency 50% as a rough estimate. Then again, the nature of SSB means the output level would continuously switch in/out of the more efficient class-S operation; and be below the 20/100W for some of the time, e.g. speech pauses. So it would seem feasible to hope for very approximately 10% of dissipation. Across 2 FETs this is only 5W each - A feasible amount for small SMD FETs.

A third solution for narrow PWM/low amplitude is to bandpass filter the output, and simply drop out pulses to halve the amplitude. This would cause a fundamental at half frequency, and a step change in amplitude. Some kind of DSP would probably be used for driving it all anyway, so known anomalies can be catered for. This starts to look like a class-S modulation scheme…

2. Sigma-Delta Modulator.
Class-S has been looked at in
this document to generate a modulated signal with a 4x oversampled modulation frequency. This uses the idea of Shannon's bandwidth theorem and under sampling. Using a complex PWM scheme with 4x fundamental is a lot of complication, leading back to using harmonic operation, and bandpass filtering the output.

Looking at the results of academic papers, they always have a high noise output. This goes against the amateur tradition of not causing interference. The noisy nature of a sigma-delta modulator is fine for mobile comms at >1GHz, but methods for noise reduction will have to be used at HF.

3. Out-phasing amplifier. Use the relative phase of 2 non-linear stages through a combiner. The basic idea was from Henri Chireix in 1935. Its possible to use two class-D amplifiers, resulting in very high efficiency. Two big problems with out-phasing are: separating the two drive components from the original signal; recombining without incurring losses. Out-phasing is a very complex technique to implement.

This is an elegant idea but
extremely complicated, both practically and theoretically. In particular I think the output network would be very awkward with lumped elements at HF, and switching networks for multiple bands a potential nightmare.